Original URL: http://www.reghardware.co.uk/2006/01/27/chipworks_presler_analysis/
It's official: Intel's latest 65nm dual-core desktop chip, 'Presler', shipping as the Pentium D 9xx series, has no balls. Neither, it seems, has 'Yonah', the chip giant's 65nm dual-core mobile part aka Core Duo.
The verdict comes from Canadian chip analyst Chipworks, and it's not as harsh as it might at first sound. While Intel's 90nm Pentium 4 chip, 'Prescott', used tiny solder balls made of a lead-tin alloy to connect the die to the chip package's pins, Presler instead uses copper structures called 'pillar bumps'. So does Yonah.
Presler's copper pillar bumps (left) and Prescott's solder balls
Chipworks calls the new approach "Copper Pillar Bumping (CPB) technology", and reckons Intel is the first chip maker to use the technique. The reason? It allows Intel to cut the amount of lead used in the products, helping it meet targets set by Reduction of Hazardous Substances (RoHS) legislation in Europe and elsewhere.
There are other benefits, Chipworks said: CPB "offers higher connection density, better electrical and heat-dissipating performance, greater mechanical strength and potentially increased reliability".
"The silicon process technology and strained silicon science being manufactured at 65nm is nothing short of amazing," enthused Chipworks' Gary Tomkins, head of the company's Technical Intelligence division. "Intel has also taken an additional significant development leap with this new advanced packaging technology."
Further results from from Chipworks' disassembly of Presler can be found in its report Intel 'Presler' BX80553920 Processor Structural Analysis, detailed here (http://www.chipworks.com/webreports/ShowOverview.asp?reportcode=SAR-0602-801&m=0). ®
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